The strength of the signal. "strong" (default) or "weak" Defines the signals and high-level function of a bus. This element indicates that a master interface may be directly connected to a slave interface (under certain conditions) for busses of this type. Optional name of bus type that this bus definition is compatible with. This bus definition may change the definitions of signals in the existing bus definition and add new signals, the signals in the original bus are not deleted but may be marked illegal to disallow their use. Indicates the maximum number of masters this bus supports. If this element is not present, the number of masters allowed is unbounded. Indicates the maximum number of slaves this bus supports. If the element is not present, the number of slaves allowed is unbounded. This is a list of logical ports defined by the bus. The assigned name of this port in bus specifications. A port can carry both address and data, but may not mix this with a clock or reset If this element is present, the port contains address information. If this element is present, the port contains data information. If this element is present, the port contains only clock information. Is this element is present, the port contains only reset information. Defines constraints for this port when present in a system bus interface with a matching group name. Used to group system signals into different groups within a common bus. Number of bits required to represent this signal. Absence of this element indicates unconstrained number of bits, i.e. the component will define the number of bits in this signal. Defines constraints for this port when present in a master bus interface. Number of bits required to represent this signal. Absence of this element indicates unconstrained number of bits, i.e. the component will define the number of bits in this signal. Defines constraints for this port when present in a slave bus interface. Number of bits required to represent this signal. Absence of this element indicates unconstrained number of bits, i.e. the component will define the number of bits in this signal. Definition of a driver for this port. The initial or default value on the port. Name of the driver for this port Parameters of the driver Container element for parameters defined for a bus definition. Defines a parameter which can be specified on a bus interface. The parameter is fully described on the bus definition and then instantiated on the bus interface. Setting 'consistent' to true implies that the parameter must have the same value on the corresponding bus interface parameters on both sides of connected interfaces. String for describing the bus definition to users