# uvm_push_sequencer #(REQ,RSP)

Summary

uvm_push_sequencer #(REQ,RSP)
Class Hierarchy
uvm_void
uvm_object
uvm_report_object
uvm_component
uvm_sequencer_base
uvm_sequencer_param_base#(REQ,RSP)
uvm_push_sequencer#(REQ,RSP)
Class Declaration
> class uvm_push_sequencer #(
> | type | REQ | = | uvm_sequence_item,
> |  | RSP | = | REQ
> ) extends uvm_sequencer_param_base #(REQ, RSP)
Ports |
req_port | The push sequencer requires access to a blocking put interface.
Methods |
new | Standard component constructor that creates an instance of this class using the given name and parent, if any.
run_phase | The push sequencer continuously selects from its list of available sequences and sends the next item from the selected sequence out its req_port using req_port.put(item).

### Ports

### req_port

The push sequencer requires access to a blocking put interface. A continuous stream of sequence items are sent out this port, based on the list of available sequences loaded into this sequencer.

### Methods

### new

> function new (
> | string | name, |  |
> | uvm_component | parent | = | null
> )

Standard component constructor that creates an instance of this class using the given name and parent, if any.

### run_phase

> task run_phase(
> | uvm_phase | phase
> )

The push sequencer continuously selects from its list of available sequences and sends the next item from the selected sequence out its req_port using req_port.put(item). Typically, the req_port would be connected to the req_export on an instance of a uvm_push_driver #(REQ,RSP), which would be responsible for executing the item.

> virtual class uvm_void

The uvm_void class is the base class for all UVM classes.

> virtual class uvm_object extends uvm_void

The uvm_object class is the base class for all UVM data and hierarchical classes.

> class uvm_report_object extends uvm_object

The uvm_report_object provides an interface to the UVM reporting facility.

> virtual class uvm_component extends uvm_report_object

The uvm_component class is the root base class for UVM components.

> class uvm_sequencer_base extends uvm_component

Controls the flow of sequences, which generate the stimulus (sequence item transactions) that is passed on to drivers for execution.

> class uvm_sequencer_param_base #(
> | type | REQ | = | uvm_sequence_item,
> | type | RSP | = | REQ
> ) extends uvm_sequencer_base

Extends uvm_sequencer_base with an API depending on specific request (REQ) and response (RSP) types.

> class uvm_push_sequencer #(
> | type | REQ | = | uvm_sequence_item,
> |  | RSP | = | REQ
> ) extends uvm_sequencer_param_base #(REQ, RSP)

> function new (
> | string | name, |  |
> | uvm_component | parent | = | null
> )

Standard component constructor that creates an instance of this class using the given name and parent, if any.

> task run_phase(
> | uvm_phase | phase
> )

The push sequencer continuously selects from its list of available sequences and sends the next item from the selected sequence out its req_port using req_port.put(item).
The push sequencer requires access to a blocking put interface.

> class uvm_push_driver #(
> | type | REQ | = | uvm_sequence_item,
> | type | RSP | = | REQ
> ) extends uvm_component

Base class for a driver that passively receives transactions, i.e.